Use this reference when you want to confirm whether a circuit element is supported, check its syntax, or compare model limitations before you prepare a netlist. Elements not listed here are unsupported and will produce a parse error.

Before you commit an Adapter Circuit workflow to a PoC or customer-facing demonstration, compare your actual netlist subset against this chapter first. The fastest way to lose time in evaluation is to assume broader SPICE coverage than the documented subset actually provides.

Use this reference as a support-boundary document, not just a syntax sheet. If your source deck depends on an element, directive, device level, or simulator behavior not listed here, treat that dependency as outside the current RC scope unless delivery notes or a support addendum say otherwise.

Most readers should not start here. Use it as a boundary check before you commit serious PoC effort to a netlist-based path, or when Adapter Circuit behavior needs to be compared against the documented subset.

Use the adjacent boundary chapters with it:

use Platform Notes when the question is host or package support scope
use Plugin System when the question is manifest, ABI, or solver-plugin deployment behavior

Passive Elements

R -- Resistor

Rname n1 n2 value

Linear resistor between nodes n1 and n2. Resistance in ohms. No temperature coefficient or nonlinear resistor model.

C -- Capacitor

Cname n1 n2 value

Linear capacitor. Capacitance in farads. No initial condition (.ic is not supported).

L -- Inductor

Lname n1 n2 value

Linear inductor. Inductance in henries. No initial current.

K -- Mutual Inductor Coupling

Kname L1 L2 coefficient

Mutual coupling between two named inductors L1 and L2. Coupling coefficient |k| <= 1. The coupled inductors share a matrix stamp.

Independent Sources

V -- Voltage Source

Vname n+ n- [DC dc_value] [AC ac_mag [ac_phase]] [waveform]

I -- Current Source

Iname n+ n- [DC dc_value] [AC ac_mag [ac_phase]] [waveform]

Positive current flows from n+ to n- through the source.

Waveform Functions

Appended to a V or I source declaration:

Waveform	Syntax	Parameters
DC only	`DC value`	Constant value (volts or amps)
SIN/SINE	`SIN(vo va freq [td [theta [phase]]])`	Offset, amplitude, frequency (Hz), delay (s), damping, phase (deg)
PULSE	`PULSE(v1 v2 td tr tf pw [per])`	Low/high levels, delay, rise/fall times, pulse width, optional period
PWL	`PWL(t1 v1 t2 v2 ...)`	Piecewise-linear time-value pairs; times must be nondecreasing
EXP	`EXP(v1 v2 td1 tau1 td2 tau2)`	Dual-exponential: starts at v1, rises to v2
SFFM/FM	`SFFM(vo va fm_freq mdi fc [td [phasem [phasec]]])`	Single-frequency FM
AM	`AM(vo vmo vma fm_freq fc [td [phasem [phasec]]])`	Amplitude modulation

Default waveform when none is specified: DC 0.

Controlled Sources

E -- VCVS (Voltage-Controlled Voltage Source)

Ename n+ n- nc+ nc- gain

V(n+,n-) = gain * V(nc+,nc-). Voltage gain (dimensionless).

G -- VCCS (Voltage-Controlled Current Source)

Gname n+ n- nc+ nc- transconductance

I(n+→n-) = transconductance * V(nc+,nc-). Transconductance in siemens.

F -- CCCS (Current-Controlled Current Source)

Fname n+ n- vsource_name gain

I(n+→n-) = gain * I(vsource_name). The controlling element must be a voltage source (its current is sensed). Current gain (dimensionless).

H -- CCVS (Current-Controlled Voltage Source)

Hname n+ n- vsource_name transresistance

V(n+,n-) = transresistance * I(vsource_name). The controlling element must be a voltage source. Transresistance in ohms.

Semiconductor Devices

D -- Diode

Dname anode cathode [AREA area]

Shockley equation: Id = IS * (exp(Vd / (N * VT)) - 1). Parameters: IS (saturation current, A), N (ideality factor), VT (thermal voltage, V). All must be positive (defaults: IS=1e-14, N=1, VT=0.02585).

Q -- BJT (Bipolar Junction Transistor)

Qname C B E [S] model_name [AREA area]

Gummel-Poon DC model (NPN or PNP). Four terminals: collector, base, emitter, optional substrate. References a .model card.

.model parameters: IS (saturation current), BF (forward beta), BR (reverse beta), VT (thermal voltage). Instance parameter: AREA.

M -- MOSFET

Mname D G S B model_name [W w] [L l] [M multiplier]

LEVEL=1 only (Shichman-Hodges model). NMOS or PMOS. Four terminals: drain, gate, source, bulk. References a .model card.

.model parameters: KP (transconductance, A/V^2), VTO (threshold voltage, V), LAMBDA (channel-length modulation, 1/V). Instance parameters: W, L, M (all default to 1.0; must be > 0).

Switches

S -- Voltage-Controlled Switch

Sname n+ n- nc+ nc- model_name [ON|OFF]

Controlled by voltage V(nc+,nc-). .model type SW.

.model SW parameters: RON, ROFF (on/off resistance, ohms), VON, VOFF (on/off threshold voltages), or VT, VH (threshold, hysteresis).

W -- Current-Controlled Switch

Wname n+ n- vsource_name model_name [ON|OFF]

Controlled by current I(vsource_name). .model type CSW.

.model CSW parameters: RON, ROFF (on/off resistance), ION, IOFF (on/off threshold currents), or IT, IH (threshold, hysteresis).

Frequency-Domain Blocks

NPORT -- N-port from Touchstone Data

NPORT_name n1 n2 ... n2N FILE="path/to/file.sNp" [TYPE=Y|Z] [INTERP=linear|log]

Imports frequency-dependent N-port from a Touchstone file (.sNp, .yNp, .zNp). AC analysis only -- transient analysis with NPORT elements returns an error.

Parameters: FILE (path), TYPE (Y or Z, default: from file extension), FORCE_TYPE (override file type), INTERP (linear or log), EXTRAP (hold or linear).

S -- S-parameter Block

Sname n1 n2 ... n2N FILE="path/to/file.sNp" [Z0=50]

Loads Touchstone S-parameter data. Supports Z0/ZREF override for reference impedance.

Power System Elements

XTAPZ -- Tapped Series Impedance

XTAPZ_name n1 n2 tap r x [phase deg] [freq Hz]

Tapped series impedance for power system modelling. Required: tap ratio, r (resistance, ohms), x (reactance, ohms). Optional: phase offset (degrees), frequency base (Hz).

Subcircuits

.SUBCKT / .ENDS / X

.subckt subname n1 n2 ...
... elements ...
.ends

Xinst n1 n2 ... subname

Subcircuits are expanded (flattened) at parse time. Parameters passed via .param are supported numerically. .global nodes are silently ignored -- all node connections are local to the subcircuit instance.

Unsupported SPICE Features

The following standard SPICE directives are recognised but silently ignored (a warning is emitted during parse):

.temp, .ic, .nodeset, .option, .options, .dc, .op, .tf, .meas, .measure, .plot, .func, .global, .if/.else/.endif, .title, .csparam

Do not treat these warnings as cosmetic during evaluation. If your source deck depends on one of the directives above for operating point, initialization, or post-processing intent, the imported behavior may differ from your original simulator.

For PoC planning, treat every ignored directive as a required review item. A deck may parse successfully and still fall outside the intended acceptance scope if those directives carry essential setup or validation meaning in the source simulator.

The following SPICE elements are not supported and will cause a parse error:

J (JFET)
T (transmission line, lossless)
O (transmission line, lossy)
U (uniform RC line)
Z (MESFET)
MOSFET LEVEL > 1 (BSIM, etc.)
Nonlinear magnetics / saturable cores

Element Reference